VLSI – Analog layout design of block level and chip level from schematics
Ability to work with teams and juniors and guide them and sub delegate work, if required. Manage customer expectations and own deliveries as defined in the project schedule Excellent verbal and written communication skills are required. Expert on Analog layout design of block level and chip level from schematics. Hands on experience in Analog Layout design of various designs SerDes, LVDS, DDR Phy, PLL, Linear and Switching regulators and analog building blocks amplifiers, comparator, oscillator, voltage and current reference circuits etc. Good understanding of deep sub-micron and DFM issues and layout techniques Should have work experience in CMOS process technologies 22nm, 28nm, 45nm, 65nm etc. Thorough working knowledge of layout design and physical verification tools – Cadence Virtuoso layout suite, Mentor Calibre, Synopsys Hercules etc.
IT-Software / Software Services
IT Hardware, Technical Support, Telecom Engineering
Hardware Design Engineer
Permanent Job, Full Time
Desired Candidate Profile
Experience (In Month):
UG -B.Tech/B.E. – Any Specialization
Doctorate Not Required
Aricent Technologies (H) Limited
Aricent is the worldÃ¢â‚¬â„¢s #1 pure-play product engineering services and software firm. The company has 20-plus years experience co-creating ambitious products with the leading networking, telecom, software, semiconductor, Internet and industrial companies. The firm’s 10,000-plus engineers focus exclusively on software-powered innovation for the connected world.
Based in San Francisco, frog, the global leader in innovation and design, is part of Aricent. The companyÃ¢â‚¬â„¢s key investors are Kohlberg Kravis Roberts &amp; Co. and Sequoia Capital.